Table of Contents
HIL Write Other Timebase
Writes to the specified other channels at the sampling rate of the model and acts as a timebase for the model.
Library
MATLAB Command Line
Click to copy the following command line to the clipboard. Then paste it in the MATLAB Command Window:
qc_open_library('quarc_library/Data Acquisition/Generic/Timebases')Description
The HIL Write Other Timebase block writes to the specified other channels at every sampling instant. The timebase for the model is provided by the block itself. Only one HIL Timebase block may appear in the model. Multiple timebases for a model are not supported.
Limitations
Data streaming not control
The HIL Write Other Timebase block is not intended for control.
The HIL Write Timebase blocks maintain an internal buffer whose size is set by the Samples in buffer parameter. Each time the block executes, the input signal is written to this buffer. In the background, the data in the buffer is written to the hardware at the sampling rate of the model, with one sample written each period. The HIL Write Timebase blocks do not wait for each sample to be written to the hardware. They only wait for space in the buffer. For example, if the buffer has room for 10 samples, then the model will quickly execute 10 iterations, filling up the buffer. Once the buffer is full, the model will wait for the next sampling instant for the oldest sample to be written to the hardware and to make room for another sample. Hence, after those initial 10 iterations the model will run at the sampling rate expected. However, the data written to the hardware will lag the current value of the input signal by 10 iterations!
Thus, the HIL Write Timebase blocks are unsuitable for control, because lags are generally destabilizing. Instead, they are intended for data streaming applications, such as audio, where constant lags are often acceptable. For control systems, use one of the HIL Read Timebase blocks to establish the sampling rate instead and use one of the HIL Write immediate I/O blocks to write to the hardware.
Input Ports
The number of input ports depends on the Vector input parameter. If this option is checked then the input is a vector containing the other values to write to the channels specified in the Channels parameter. Otherwise there is one input port for each channel and each port contains the other value to write to the corresponding channel. Refer to the documentation on the Vector input parameter below for more details.
Output Ports
This block has no output ports.
Data Type Support
The HIL Write Other Timebase block accepts signals of any of the built-in Simulink data types. Fixed point is not supported.
Parameters and Dialog Box
Board Name
The name of the board whose other channels will be written. Boards are configured using the HIL Initialize block. Place an HIL Initialize block in your diagram to add a board name to the list.
Clock
The clock to use as a basis for the timebase. In general, both system clocks and hardware clocks specific to the board are supported. This parameter must be a scalar. A positive value indicates a hardware clock. For example, enter 0 for HARDWARE_CLOCK_0, 1 for HARDWARE_CLOCK_1, etc. The number of hardware clocks available depends on the board selected. A negative value indicates a system clock. The sampling rate for the block is determined by the fundamental sampling rate of the model, which is the sampling time entered in the Fixed step size field of the Solver pane of the Configuration parameters. Refer to Clocks for more information.
Select a board type from the list for board-specific details:
Channels
The other channels to write. The number of channels available depends on the board selected. Refer to Other Channels for more information about other channels in QUARC.
Most boards do not support other channels. Select a board type from the list for board-specific details:
Samples in buffer
The number of samples in the task buffer. Timebase blocks are implemented as HIL tasks. Tasks operate as separate "threads" in the driver for the card that read data from the hardware at a given rate. The data read is stored in the task buffer. If the task buffer overflows then the blocks stops the model with an error. Each time the block executes, it reads one sample from the task buffer. If there is no data in the task buffer then it waits until a sample arrives. Hence, the block synchronizes the diagram to the sampling rate of the task. Making the number of samples in the task buffer greater than one allows the sampling rate to temporarily exceed one sampling interval, which is useful for normal simulation.
Some boards restrict the number of samples that may be specified. Select a board type from the list for board-specific details:
Vector input
If this option is checked then the block will have a single vector input with one element in the vector for each channel. The values for each channel should appear in the vector in the same order as the channels in the Channels parameter.
If this option is not checked then the block will have one input for each channel. The input ports will appear in the same order as the channels in the Channels parameter. Each port will be labeled with the corresponding channel number.
Targets
Target Name |
Compatible* |
Model Referencing |
Comments |
---|---|---|---|
Yes |
Not supported in a referenced model. Use in top-level model only. |
Only one HIL Timebase block is allowed in a model. |
|
Yes |
Not supported in a referenced model. Use in top-level model only. |
Only one HIL Timebase block is allowed in a model. |
|
Yes |
Yes |
||
Yes |
Yes |
||
Yes |
Yes |
||
Yes |
Yes |
||
Yes |
Yes |
||
Yes |
Yes |
||
Yes |
Yes |
||
Yes |
Yes |
||
Yes |
Yes |
||
Yes |
Yes |
||
No |
No |
Not supported. |
|
Yes |
Not supported in a referenced model. Use in top-level model only. |
Last fully supported in QUARC 2018. Only one HIL Timebase block is allowed in a model. |
|
Rapid Simulation (RSIM) Target |
Yes |
Yes |
Only one HIL Timebase block is allowed in a model. |
S-Function Target |
No |
N/A |
Old technology. Use model referencing instead. |
Normal simulation |
Yes |
Yes |
Due to safety and liability concerns, the hardware may not be accessed during normal simulation. |
See Also
Copyright ©2024 Quanser Inc. This page was generated 2024-10-17. Submit feedback to Quanser about this page.
Link to this page.