CEAL NI PCI-6255 CEAL Quanser QPID navigation bar

Table of Contents

CEAL NI PCI-6255 and Quanser QPID

Reads from the National Instruments PCI-6255 card all of its 80 analog input channels as well as its 8 first digital channels at the sampling rate of the model and also acts as a timebase for the model. Also implements the Quanser QPID watchdog timer and reads from the Quanser QPID card its 8 first digital channels at the sampling rate of the model.

Library

QUARC Applications/CEAL/Data Acquisition

Description

CEAL NI PCI-6255 and Quanser QPID

The CEAL NI PCI-6255 and Quanser QPID block reads from the National Instruments PCI-6255 card all of its 80 analog input channels as well as its 8 first digital channels (i.e., from the digital input channels 0 to 7) at every sampling instant and acts as a timebase for the model. The hardware timebase for the model is provided by the block itself. The CEAL NI PCI-6255 and Quanser QPID block also implements the Quanser QPID watchdog timer and reads from the Quanser QPID card its 8 first digital channels at the sampling rate of the model. Only one CEAL NI PCI-6255 and Quanser QPID block or CEAL NI PCI-6255 block or CEAL Quanser QPID block may appear in the model.

This block consists of a subsystem which includes two QUARC HIL Initialize and HIL Read Digital blocks (one for each of the NI PCI-6255 and Quanser QPID cards), as well as the QUARC HIL Read Analog Timebase block (for the NI PCI-6255 card), and HIL Watchdog block (for the Quanser QPID card).

The 80-element vector output signal of the HIL Read Analog Timebase block contains all 80 analog inputs and is obtained by using a From block configured with the following Goto Tag: CEAL_PCI_6255_0_AI_0_79.

The 8-element vector output signal of one of the HIL Read Digital blocks contains the 8 first digital inputs of the NI PCI-6255 card and is obtained by using a From block configured with the following Goto Tag: CEAL_PCI_6255_0_DI_0_7.

The 8-element vector output signal of the other HIL Read Digital block contains the 8 first digital inputs of the Quanser QPID card and is obtained by using a From block configured with the following Goto Tag: CEAL_QPID_0_DI_0_7.

The expired output signal of the HIL Watchdog block is obtained by using a From block configured with the following Goto Tag: CEAL_QPID_0_watchdog_expired.

Input Ports

This block has no input ports.

Output Ports

This block has no output ports.

Parameters and Dialog Box

CEAL NI PCI-6255 and Quanser QPID

The CEAL NI PCI-6255 and Quanser QPID block has no parameters.

Targets

Target Name

Compatible*

Model Referencing

Comments

QUARC Win32 Target

Yes

Not supported in a referenced model. Use in top-level model only.

Only one HIL Timebase block and one HIL Watchdog block are allowed in a model.

QUARC Win64 Target

Yes

Not supported in a referenced model. Use in top-level model only.

Only one HIL Timebase block and one HIL Watchdog block are allowed in a model.

QUARC Linux Nvidia Target

Yes

Yes

QUARC Linux QBot Platform Target

Yes

Yes

QUARC Linux QCar 2 Target

Yes

Yes

QUARC Linux QDrone 2 Target

Yes

Yes

QUARC Linux Raspberry Pi 3 Target

Yes

Yes

QUARC Linux Raspberry Pi 4 Target

Yes

Yes

QUARC Linux RT ARMv7 Target

Yes

Yes

QUARC Linux x64 Target

Yes

Yes

QUARC Linux DuoVero Target

No

No

Not supported.

QUARC Linux DuoVero 2016 Target

Yes

Yes

QUARC Linux Verdex Target

No

No

Not supported.

QUARC QNX x86 Target

No

No

Not supported.

Rapid Simulation (RSIM) Target

Yes

Yes

Only one HIL Timebase block and one HIL Watchdog block are allowed in a model.

S-Function Target

No

N/A

Old technology. Use model referencing instead.

Normal simulation

Yes

Yes

Due to safety and liability concerns, the hardware may not be accessed during normal simulation.

* Compatible means that the block can be compiled for the target.

 

navigation bar