HIL Watchdog
Implements a watchdog timer.
Library
QUARC Targets/Data Acquisition/Generic/Watchdog
Description
The HIL Watchdog block implements a watchdog timer. The watchdog timer on the data acquisition card is programmed with the specified timeout, such as 0.1 seconds. However, every sampling instant, the HIL Watchdog block reloads the watchdog timer to prevent it from expiring. If the watchdog timer manages to expire, due to lost sampling instants or the model crashing, then the watchdog timer automatically sets the outputs of the card to predefined values. For example, it might set the analog outputs to 0 V. The watchdog feature is important in safety-critical applications where the system must handle unexpected software failures.
If your model uses external communications (streaming data such as plots back to your model),
there is a known limitation that upon stopping your model, there will be a delay before the final
outputs are written and the watchdog is stopped. This delay is device, PC, and model dependent and
can exceed the normal jitter time of a running model. If your watchdog outputs and final outputs are
the same values, then there will be no apparent difference. However, if the watchdog outputs differ
from the final outputs then stopping the model under normal conditions could trigger the watchdog
to expire. You will need to determine what the minimum safe watchdog delay is through experimentation if
this is the case. If you need a tighter watchdog limit, then disable external communications by
selecting from the menu, then going to the
tab, and changing the Data exchange interface mode
to none. Rebuild your model, then follow the instructions in
Using Windows Explorer to Manage Models
to run your model directly from Windows Explorer. No online graphing or parameter tuning will be
available when this is done though.
The values to which the analog, PWM, digital and other output channels are set are configured in the HIL Initialize block. Not all cards support watchdog timers, and not all watchdog timers support the setting of all the output channels to predefined values. Some cards only support setting the output channels to one particular value, such as 0. See the card-specific documentation for details.
The output of the HIL Watchdog block indicates whether the watchdog has expired. If the output is zero then the watchdog was successfully reloaded before the watchdog timer expired. If the watchdog expires before it can be reloaded then the output goes high (1), and all outputs to the card are disabled by the driver. Further output to the card from other HIL blocks will be ignored until the "watchdog state" is cleared using the HIL Watchdog Clear block. Often, however, the output of the HIL Watchdog block is connected to a Stop With Error block to stop the model and issue an error message.
For some systems, the watchdog resets the entire system so this condition is never seen. In this case, the model should probably be configured to load at boot so that it resumes operation after the system reset. See the qc_load_model_at_boot command for details on configuring a model to load at boot.
Input Ports
This block has no input ports.
Output Ports
expired
A boolean output indicating whether the watchdog has expired before it could be reloaded. The output is true (1) if the watchdog has expired and false (0) otherwise.
Data Type Support
The HIL Watchdog block outputs a boolean signal.
Parameters and Dialog Box
Board Name
The name of the board whose watchdog timer will be programmed. Boards are configured using the HIL Initialize block. Place an HIL Initialize block in your diagram to add a board name to the list.
Timeout
The timeout interval in seconds for the watchdog timer. This value should always be larger than the sample time of the block because otherwise the watchdog will always manage to expire before being reloaded.
Select a board type from the list for board-specific details:
Sample time
The sample time of the block. A sample time of 0 indicates that the block will be treated as a continuous time block. A positive sample time indicates that the block is a discrete time block with the given sample time.
A sample time of -1 indicates that the block inherits its sample time. Since this is a source block, only inherent the sample time when it is placed in a conditionally executed subsystem, like a Triggered or Enabled Subsystem, or in a referenced model.
The default sample time is set to qc_get_step_size, which is a QUARC function that returns the fundamental sampling time of the model. Hence, the default sample time is a discrete sample time with the same sampling time as the fixed step size of the model.
Targets
|
Target Name |
Compatible* |
Model Referencing |
Comments |
|---|---|---|---|
|
Yes |
Yes |
||
|
Yes |
Yes |
||
|
Yes |
Yes |
||
|
Yes |
Yes |
||
|
Yes |
Yes |
||
|
Yes |
Yes |
||
|
Yes |
Yes |
||
|
Yes |
Yes |
||
|
Yes |
Yes |
||
|
Yes |
Yes |
||
|
Yes |
Yes |
||
|
Yes |
Yes |
||
|
Yes |
Yes |
||
|
Yes |
Yes |
Last fully supported in QUARC 2018. |
|
|
Rapid Simulation (RSIM) Target |
Yes |
Yes |
|
|
S-Function Target |
No |
N/A |
Old technology. Use model referencing instead. |
|
Normal simulation |
Yes |
Yes |
Due to safety and liability concerns, the hardware may not be accessed during normal simulation. |
See Also
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