Table of Contents
Owning Palette: | HIL/CD&Sim/Watchdog |
Requirements: | Quanser Rapid Control Prototyping Toolkit, LabVIEW 2020 or newer, Control Design and Simulation Module |
Clears the watchdog state of a HIL board.
board in is a reference to a HIL Board instance that represents the open HIL board. This input must be wired to a valid HIL Board signal, as generated by a HIL Initialize VI. |
board out is a copy of the HIL Board instance passed to the board in input. |
When a board is in the watchdog state it is not possible to write to the outputs. Clearing the watchdog state allows the outputs to be written once again. The watchdog state prevents a VI from overwriting the outputs and negating the safety benefit of watchdog timer expiring. The CL Watchdog Clear VI allows a diagram to recover from watchdog expiry and resume operation.
All input/output pairs of this function have direct feedthrough behaviour.
RCP CL HIL Watchdog Example |
CL HIL Watchdog | Activates and reloads the watchdog timer of a HIL board. |
Target |
Supported |
Comments |
---|---|---|
Yes |
Fully supported. |
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