NI PXI-6722

The National Instruments PXI-6722 is a PXI based AO Series card. Please see the National Instruments' website for the NI PXI-6722 data sheet. The Rapid Control Prototyping Toolkit driver name for this card is ni_pxi_6722 .

Clocks

This card is part of the DAQmx API, and therefore the hardware clocks cannot be directly accessed. The clocks can only be set indirectly with the functions that utilize them such as the timebase VIs.

Only one timebase VI may be present in a diagram. In addition, an immediate VI for the same type of channel can not be used even if they use different resources. For instance, if a HIL Read Timebase Analog (Scalar) VI is in use, you cannot also have a HIL Read Analog (Scalar) VI in the diagram, even if the two VIs do not read the same analog input channels.

The HIL Read Timebase VI only supports a buffer size of 1. The same holds true of the task creation functions. When adding a timebase VI, you must change the Samples in buffer field or you will receive the error "The specified buffer size is not valid. It may be out of an acceptable range."

Analog Inputs

The NI PXI-6722 card does not support analog inputs.

Analog Outputs

The NI PXI-6722 supports 8 analog outputs (channels 0 to 7) with 13-bit resolution.

The valid output ranges are ±10V, so it is not necessary to specify the range in the HIL Initialize VI.

In order to have analog outputs set to a particular voltage when the block diagram is run or stopped, the analog outputs must be configured on the HIL Initialize VI's Analog Outputs tab. Set the Initial analog outputs and Final analog outputs to the desired voltage values.

Digital I/O

The NI PXI-6722 supports 8 bidirectional digital lines (lines 0 to 7).

A digital I/O line cannot be used as an input and output at the same time.

Since the digital I/O lines may be individually programmed as inputs or outputs, the direction of each digital I/O line should be configured on the HIL Initialize VI's Digital I/O tab.

To set the digital output values when the block diagram is run or stopped, set the Initial digital outputs and Final digital outputs to the desired values respectively.

Encoder Inputs

The NI PXI-6722 supports 2 quadrature encoder inputs with 24-bit count values (channels 0 and 1). Note that since this card uses its counters for both encoder inputs and PWM outputs, you can only use a counter as either an encoder input or a PWM output channel.

In order to set the encoder counters to a particular count or to change the default quadrature when the block diagram is run, the encoder inputs must be configured on the HIL Initialize VI's Encoder Inputs tab. The NI PXI-6722 supports non-quadrature (count and direction), 1X quadrature, 2X quadrature and 4X quadrature. The NI PXI-6722 does not support encoder filtering.

PWM Outputs

The NI PXI-6722 supports 2 24-bit PWM Outputs using its 2 counters (channels 0 and 1). The PWM outputs on this card use a counter timebase rate of 20 MHz. Note that since this card uses its counters for both encoder inputs and PWM outputs, you can only use a counter as either an encoder input or a PWM output channel.

In order to configure the PWM mode or frequency, or to set the value of the PWM outputs when the block diagram is run or stopped, the PWM outputs must be configured on the HIL Initialize VI's PWM Outputs tab. The Initial output checkbox should always be checked.

Set the PWM output mode field to the desired output mode. The NI PXI-6722 supports all the PWM output modes: duty cycle, frequency or period. See the description of the HIL Initialize VI for details on these modes. Then set the PWM output frequency in Hz or duty cycle field to the desired frequency or duty cycle. Note that this card is part of the National Instruments' DAQmx API and one of the limitations of this API is that you cannot output a PWM signal with a 0% or 100% duty cycle. Furthermore, a value of 0 for frequency is also not acceptable. When in duty cycle mode, the acceptable range of duty cycles are:

• Minimum duty cycle = (2/counter timebase rate) / (PWM signal period)
• Maximum duty cycle = 1 - Minimum duty cycle

Note that the PWM signal period is the frequency inverted. Therefore, the acceptable value for duty cycle is related to the frequency at which the signal is being generated. In frequency mode, the acceptable range of frequencies are related to the duty cycle of the signal and are as follows:

• Minimum frequency = (counter timebase rate) / (counter bit resolution)
• Maximum frequency = 1 / (2(1/PWM duty cycle) (1/counter timebase rate))

In period mode, the maximum and minimum values for period are reciprocals of the minimum/maximum values for frequency above.

Other Inputs

The NI PXI-6722 card does not support other inputs.

Other Outputs

The NI PXI-6722 card does not support other outputs.

Interrupts

The NI PXI-6722 card, or its driver, does not support any interrupt sources.

Watchdog

The NI PXI-6722 card does not support a watchdog timer.

Board-Specific Options

The NI PXI-6722 card does not support any board-specific options.

Properties

The NI PXI-6722 card does not support any properties.

Targets

See Also

• DAQmx Overview
• Supported National Instruments Cards

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