Quanser Q4

The Quanser Q4 is an innovative H.I.L. control board with a basic range of input and output support. A wide variety of devices with analog and digital sensors as well as quadrature encoders are easily connected to the Quanser Q4. This single-board solution is ideal for use in control systems and complex measurement applications.

This card is no longer available. For a newer card with similar capabilities, visit the Quanser website for the Quanser QPIDe.

The RCP Toolkit driver name for this card is q4 .

The features of the Quanser Q4 are:

• High Resolution - 14-bit analog inputs
• Simultaneous sampling of A/D and encoder inputs
• Simultaneous output to D/A channels
• Extensive I/O: 4 each of A/D, D/A and encoders and 16 DIO on the same board
• Two 32-bit multipurpose counters, configurable as PWM outputs

This single board integration enables you to turn your PC into a powerful Desktop Control Station.

Clocks

The Quanser Q4 supports two hardware clocks: HARDWARE_CLOCK_0 (0) and HARDWARE_CLOCK_1 (1). Both clocks have 60ns resolution and 32-bit range. The SYSTEM_CLOCK_1 (-1) clock is also supported. It has 1 ms resolution. The hardware clocks may also be configured as PWM outputs. HARDWARE_CLOCK_0 appears as a PWM output at the CNTR_OUT pin and HARDWARE_CLOCK_1 at the WATCHDOG pin.

By default, the clocks are configured as hardware timebases. To use the clocks as PWM outputs, they must be configured on the HIL Initialize VI's Clocks tab.

Set the Clock mode field to the desired mode. See the description of the HIL Initialize VI for details on these modes.

The Quanser Q4 allows a third hardware "clock" to be specified as a timebase only: HARDWARE_CLOCK_2 (2). This "clock" actually represents the external interrupt line, EXT_INT. Specifying a value of 2 for the hardware clock in a HIL timebase, stream or buffered I/O VI causes the EXT_INT line to be used as the interrupt source so that an external clock may be used as a timebase. The Clock mode cannot be set for this hardware clock because it can only be configured as a timebase and not a PWM output.

Analog Inputs

The Quanser Q4 supports 4 14-bit single-ended analog inputs with a ±10V range. Hence analog channel numbers range from 0 to 3.

Since the range of the analog inputs is fixed at ±10V, there is no need to configure the analog input ranges on the HIL Initialize VI's Analog Inputs tab.

Analog Outputs

The Quanser Q4 supports 4 12-bit analog outputs in which each channel may be configured for a ±10V, ±5V or 0-10V range. As there are 4 outputs, analog channel numbers range from 0 to 3. The range of each analog output is individually programmable, so each channel may be assigned one of the three supported ranges. The ranges are set on the HIL Initialize VI's Analog Outputs tab by setting the Analog output maximums and Analog output minimums fields to the appropriate value of each channel indicated in the Analog output channels field.

In order to have analog outputs set to a particular voltage when the VI diagram is run or stopped, the analog outputs must be configured on the HIL Initialize VI's Analog Outputs tab.

Set the Analog output maximums and the Analog output minimums field to the appropriate values for the desired analog output ranges. Then set the Initial analog outputs and Final analog outputs to the desired voltages.

Digital I/O

The Quanser Q4 supports 16 bidirectional digital I/O lines and 3 special digital input lines. Hence digital input channel numbers range from 0 to 18. Channels 16 through 18 are FUSE, EXT_INT and CNTR_EN respectively. A digital I/O line cannot be used as an input and output at the same time.

Since the first 16 digital I/O lines may be individually programmed as inputs or outputs on the Quanser Q4, all of those 16 channels which will be used for digital inputs should be configured on the HIL Initialize VI's Digital I/O tab.

Digital output channel numbers range from 0 to 15. A digital I/O line cannot be used as an input and output at the same time.

Since the digital I/O lines may be individually programmed as inputs or outputs on the Quanser Q4, all the channels which will be used for digital outputs must be configured on the HIL Initialize VI's Digital Outputs tab.

To set the digital output values when the VI diagram is run or stopped, set the Initial digital outputs and Final digital outputs parameters to the desired values respectively.

Each digital output can source up to 25 mA of current maximum, with a total of 75 mA maximum for each set of four channels (0-3, 4-7, etc). Do not exceed these maximums!

Encoder Inputs

The Quanser Q4 supports 4 quadrature encoder inputs with 24-bit count values. Hence encoder channel numbers range from 0 to 3.

In order to set the encoder counters to a particular count when the VI is run, the encoder inputs must be configured on the HIL Initialize VI's Encoder Inputs tab.

The Quanser Q4 supports non-quadrature (count and direction), 1X quadrature, 2X quadrature and 4X quadrature. The Quanser Q4 supports filter frequencies of 1 /(60e-9 * N) where N=1..511. In other words, valid Quanser Q4 filter frequencies range from 33kHz to 16.7MHz. Since the Quanser Q4 has 24-bit counters, valid initial count values range from -8,388,608 to +8,388,607.

PWM Outputs

The Quanser Q4 driver supports two PWM output channels using its two hardware clocks. Change the mode of a hardware clock to use it as a PWM output. See the section on Clocks above.

In order to configure the PWM mode or frequency, or to set the value of the PWM outputs when the VI is run or stopped, the PWM outputs must be configured on the HIL Initialize VI's PWM Outputs tab.

Set the PWM output mode field to the desired output mode. The Quanser Q4 supports all the PWM output modes: duty cycle, frequency or period. See the description of the HIL Initialize VI for details on these modes. Then set the PWM output frequency in Hz or duty cycle field to the desired frequency or duty cycle. The Quanser Q4 supports PWM output frequencies from 0.008Hz to 16.7MHz. However, the PWM output frequency affects the number of bits of resolution. For example, a frequency of 16.276kHz results in 10 bits of resolution in the duty cycle, while a frequency of 4.069kHz results in 12 bits of resolution. A frequency of 65.104kHz results in 8 bit resolution.

Other Inputs

The Quanser Q4 card does not support other inputs.

Other Outputs

The Quanser Q4 card does not support other outputs.

Interrupts

The Quanser Q4 card, or its driver, does not support any interrupt sources.

Watchdog

The Quanser Q4 supports the use of the 32-bit general purpose clock, HARDWARE_CLOCK_0, as a watchdog timer. The timer may be programmed with any interval between 60 ns and 128 seconds. The board is capable of resetting the analog outputs to 0V and the digital outputs to tristate (pulled high by internal 47K resistive pull-ups) upon expiration of the watchdog timer. Resetting of the outputs occurs without software intervention, and therefore may be used as a safety mechanism in the event of software failure. To enable the resetting of the analog and digital outputs, check the Set output on watchdog option on the respective tabs of the HIL Initialize VI parameters dialog and set the Output on watchdog expiry fields for the analog and digital outputs to 0 V and 2 (tristate) respectively. Then place a CL HIL Watchdog VI in the diagram.

When the watchdog functionality is used, the WATCHDOG pin will reflect the status of the watchdog timer. The WATCHDOG pin may be found on the CONTROL header on the Quanser Q4 terminal board. This pin is normally high. If the watchdog timer is allowed to expire, then this pin will go low. Once the watchdog has expired, further I/O is disabled until the watchdog state is cleared or the watchdog timer is stopped. The watchdog pin remains low after expiration until the watchdog is restarted or the watchdog is configured for other functionality, such as a PWM output or hardware timebase. Hence, in block diagrams, the WATCHDOG pin will remain low after watchdog expiration even after the VI is stopped, unless a CL HIL Watchdog Clear VI is used to clear the watchdog state. Restarting the VI causes the WATCHDOG pin to go high once more. These semantics make the WATCHDOG pin useful for ensuring product safety.

The fuse on the Quanser Q4 terminal board also acts as a watchdog in the sense that if the fuse blows, the analog outputs are reset to 0V and the digital outputs go tristate (pulled high by internal pull-ups). In this case, the VI or application should be stopped and only restarted once the fuse has been replaced. This action of the fuse cannot be disabled.

Board-Specific Options

The Quanser Q4 card does not support any board-specific options.

Properties

The Quanser Q4 driver currently supports the following read-only properties:

Targets

See Also

• Quanser Q8
• Supported Quanser Cards

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